From f064efed78be7b3b53c4df4b578f9d079fa0d2ae Mon Sep 17 00:00:00 2001
From: Neda Moeini <neda.moeini@geant.org>
Date: Thu, 5 Dec 2024 09:53:45 +0100
Subject: [PATCH] Make ruff happy
---
gso/workflows/iptrunk/migrate_iptrunk.py | 4 +---
.../l2_circuit/test_create_imported_layer_2_circuit.py | 4 +---
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/gso/workflows/iptrunk/migrate_iptrunk.py b/gso/workflows/iptrunk/migrate_iptrunk.py
index e0a42d19..03ee4465 100644
--- a/gso/workflows/iptrunk/migrate_iptrunk.py
+++ b/gso/workflows/iptrunk/migrate_iptrunk.py
@@ -769,9 +769,7 @@ def update_subscription_model(
subscription.iptrunk.iptrunk_sides[0].iptrunk_side_node.router_site.site_name,
subscription.iptrunk.iptrunk_sides[1].iptrunk_side_node.router_site.site_name,
])
- subscription.description = (
- f"IP trunk {side_names[0]} {side_names[1]}, gs_id:{subscription.iptrunk.gs_id}"
- )
+ subscription.description = f"IP trunk {side_names[0]} {side_names[1]}, gs_id:{subscription.iptrunk.gs_id}"
return {"subscription": subscription}
diff --git a/test/workflows/l2_circuit/test_create_imported_layer_2_circuit.py b/test/workflows/l2_circuit/test_create_imported_layer_2_circuit.py
index 1bc9884a..2d4ed7a2 100644
--- a/test/workflows/l2_circuit/test_create_imported_layer_2_circuit.py
+++ b/test/workflows/l2_circuit/test_create_imported_layer_2_circuit.py
@@ -43,9 +43,7 @@ def test_create_imported_layer_2_circuit_success(
assert subscription.layer_2_circuit.virtual_circuit_id == creation_form_input_data[0]["vc_id"]
assert len(subscription.layer_2_circuit.layer_2_circuit_sides) == 2
assert subscription.layer_2_circuit.layer_2_circuit_sides[0].sbp.is_tagged is True
- assert (
- subscription.layer_2_circuit.layer_2_circuit_sides[0].sbp.gs_id == creation_form_input_data[0]["gs_id"]
- )
+ assert subscription.layer_2_circuit.layer_2_circuit_sides[0].sbp.gs_id == creation_form_input_data[0]["gs_id"]
assert (
str(subscription.layer_2_circuit.layer_2_circuit_sides[0].sbp.edge_port.owner_subscription_id)
== creation_form_input_data[0]["layer_2_circuit_side_a"]["edge_port"]
--
GitLab